中圖分類號：TN454 文獻標志碼：A DOI: 10.16157/j.issn.0258-7998.257153 中文引用格式： 張翔宇，張帥，趙宇，等. 基于扇出型晶圓級封裝的X波段異構集成T/R模組研制[J]. 電子技術應用，2026，52(2)：15-23. 英文引用格式： Zhang Xiangyu，Zhang Shuai，Zhao Yu，et al. Design of X-band heterogeneous integrated T/R module based on fan-out wafer-level packaging[J]. Application of Electronic Technique，2026，52(2)：15-23.
Design of X-band heterogeneous integrated T/R module based on fan-out wafer-level packaging
Zhang Xiangyu，Zhang Shuai，Zhao Yu，Wu Hongjiang
The 13th Research Institute of China Electronics Technology
Abstract： Based on Fan-Out Wafer-Level Packaging (FOWLP) technology, a compact X-band quad-channel transceiver module was designed and fabricated. This module heterogeneously integrates chips manufactured using Complementary Metal-Oxide Semiconductor (CMOS) and Gallium Arsenide (GaAs) processes, enabling functionalities such as low-noise amplification, amplitude-phase control, and power amplification output for received RF signals. Within the module, interconnections and fan-out among chips are achieved through redistribution layers (RDL), while vertical connections to the printed circuit board (PCB) are realized via ball grid arrays (BGA). The final module dimensions are a mere 12.8 mm × 10.4 mm × 0.5 mm. Test results indicate that the module achieves a reception gain ≥27 dB, noise figure≤4 dB, transmission gain≥26.7 dB, and saturated output power ≥24 dBm. Furthermore, the RMS accuracy of the 4-bit digital attenuation≤1 dB, and the RMS accuracy of the 6-bit digital phase shifter≤6°, all meeting design expectations. By consolidating the characteristics of two distinct material chips on a high-density resin-based packaging platform, this module demonstrates superior performance.
Key words : wafer-level packaging；T/R microsystems；system-in-package；redistribution layer；advanced packaging technology；miniaturization
引言
T/R模組是相控陣系統的重要組成部分，其性能在很大程度上決定了相控陣系統整體的性能。當前相控陣中的T/R模組技術主要發展方向為高性能、小體積、輕質量和低成本[1]。隨著電子信息技術不斷發展，越來越多的電子設備終端采用了相控陣體制，作為相控陣系統中的關鍵器件，T/R模組通常集成了功率放大器、低噪聲放大器、限幅器、數控移相器、數控衰減器等電路功能[2]。系統級封裝(System in Package, SiP)是指將多種集成多種有源結構和無源結構集成在一個封裝體內，能使產品在高集成密度的條件下保持優異性能。 T/R模組在相控陣系統中通常是許多子陣單元以陣列形式組合工作，所以其尺寸、功耗和增益等指標對整個系統的影響十分明顯，因此系統級封裝技術在T/R微系統領域應用優勢明顯。SiP具有小型化、高集成、低成本等諸多優勢。隨著電子信息技術的持續進步，對T/R模組SiP的性能要求將越來越高[3]。
本文基于FOWLP技術，設計了一款X波段四通道T/R模組。本次設計在塑封模組中集成了互補金屬氧化物半導體(Complementary Metal Oxide Semiconductor，CMOS)和砷化鎵兩種工藝結構的芯片，整合發揮了CMOS芯片可實現高密度數字集成的特點，砷化鎵高增益、低噪聲的射頻性能優勢，以及FOWLP集成密度高、模組體積小的優點，信號的輸入輸出通過BGA植球實現。經測試驗證，本次設計研制了一款高性能、低成本的四通道T/R模組，為今后FOWLP技術在T/R微系統領域的進一步應用提供了設計參考。
