</a>MRI" title="MRI">MRI" title="MRI">MRI, 波譜學和CCD圖像.本文介紹了ADS5263主要特性,方框圖, 數字處理框圖以及ADS5263EVM評估板電路圖,材料清單和元件布局圖.
Using CMOS process technology and innovative circuit techniques, the ADS5263 is designed to operate at low power and give very high SNR performance with a 4-Vpp full-scale input. Using a low-noise 16-bit front-end stage followed by a 14-bit ADC, the device gives 85-dBFS SNR up to 10 MHz and better than 80-dBFS SNR up to 30 MHz.
The device also has a 14-bit low power mode, where it operates as a quad-channel 14-bit ADC. The 16-bit front-end stage is powered down and the part consumes almost half the power, compared to the 16-bit mode. The 14-bit mode supports a 2-Vpp full-scale input signal, with typical 74-dBFS SNR. The ADS5263 can be dynamically switched between the two resolution modes. This allows systems to use the same part in a high-resolution, high-power mode or a low-resolution, low-power mode.
ADS5263主要特性:
Maximum Sample Rate: 100 MSPS
Programmable Device Resolution
Quad-Channel, 16-Bit, High-SNR Mode
Quad-Channel, 14-Bit, Low-Power Mode
16-Bit High-SNR Mode
1.35 W Total Power at 100 MSPS338 mW/Channel
4 Vpp Full-scale Input
85-dBFS SNR at fin = 3 MHz, 100 MSPS
14-Bit Low-Power Mode
785 mW Total Power at 100 MSPS195 mW/Channel
2-Vpp Full-Scale Input
74-dBFS SNR at fin = 10 MHz
Integrated Clamp (for interfacing to CCD sensors)
Low-Frequency Noise Suppression
Digital Processing Block
Programmable FIR Decimation Filters
Programmable Digital Gain: 0 dB to 12 dB
2- or 4-Channel Averaging
Programmable Mapping Between ADC Input Channels and
LVDS Output Pins—Eases Board Design
Variety of Test Patterns to Verify Data Capture by FPGA/Receiver
ADS5263應用:
• Medical Imaging – MRI
• Spectroscopy
• CCD Imaging
圖1.ADS5263功能方框圖
圖2.ADS5263數字處理框圖
ADS5263EVM評估板
This user’s guide gives an overview of the ADS5263EVM and describes how the evaluation module can be used to evaluate the performance, functions, and features of the ADS5263 device.
圖3.ADS5263EVM評估板建立框圖
圖4.ADS5263EVM評估板電路圖(1)
圖5.ADS5263EVM評估板電路圖(2)
圖6.ADS5263EVM評估板電路圖(3)
圖7.ADS5263EVM評估板電路圖(4)
圖8.ADS5263EVM評估板電路圖(5)
圖9.ADS5263EVM評估板電路圖(6)
圖10.ADS5263EVM評估板電路圖(7)
ADS5263EVM評估板材料清單(BOM):
圖11.ADS5263EVM評估板元件布局圖
詳情請見:
http://focus.ti.com/lit/ds/symlink/ads5263.pdf
和
http://focus.ti.com/lit/ug/slau344/slau344.pdf
Using CMOS process technology and innovative circuit techniques, the ADS5263 is designed to operate at low power and give very high SNR performance with a 4-Vpp full-scale input. Using a low-noise 16-bit front-end stage followed by a 14-bit ADC, the device gives 85-dBFS SNR up to 10 MHz and better than 80-dBFS SNR up to 30 MHz.
The device also has a 14-bit low power mode, where it operates as a quad-channel 14-bit ADC. The 16-bit front-end stage is powered down and the part consumes almost half the power, compared to the 16-bit mode. The 14-bit mode supports a 2-Vpp full-scale input signal, with typical 74-dBFS SNR. The ADS5263 can be dynamically switched between the two resolution modes. This allows systems to use the same part in a high-resolution, high-power mode or a low-resolution, low-power mode.
ADS5263主要特性:
Maximum Sample Rate: 100 MSPS
Programmable Device Resolution
Quad-Channel, 16-Bit, High-SNR Mode
Quad-Channel, 14-Bit, Low-Power Mode
16-Bit High-SNR Mode
1.35 W Total Power at 100 MSPS338 mW/Channel
4 Vpp Full-scale Input
85-dBFS SNR at fin = 3 MHz, 100 MSPS
14-Bit Low-Power Mode
785 mW Total Power at 100 MSPS195 mW/Channel
2-Vpp Full-Scale Input
74-dBFS SNR at fin = 10 MHz
Integrated Clamp (for interfacing to CCD sensors)
Low-Frequency Noise Suppression
Digital Processing Block
Programmable FIR Decimation Filters
Programmable Digital Gain: 0 dB to 12 dB
2- or 4-Channel Averaging
Programmable Mapping Between ADC Input Channels and
LVDS Output Pins—Eases Board Design
Variety of Test Patterns to Verify Data Capture by FPGA/Receiver
ADS5263應用:
• Medical Imaging – MRI
• Spectroscopy
• CCD Imaging
圖1.ADS5263功能方框圖
圖2.ADS5263數字處理框圖
ADS5263EVM評估板
This user’s guide gives an overview of the ADS5263EVM and describes how the evaluation module can be used to evaluate the performance, functions, and features of the ADS5263 device.
圖3.ADS5263EVM評估板建立框圖
圖4.ADS5263EVM評估板電路圖(1)
圖5.ADS5263EVM評估板電路圖(2)
圖6.ADS5263EVM評估板電路圖(3)
圖7.ADS5263EVM評估板電路圖(4)
圖8.ADS5263EVM評估板電路圖(5)
圖9.ADS5263EVM評估板電路圖(6)
圖10.ADS5263EVM評估板電路圖(7)
ADS5263EVM評估板材料清單(BOM):
圖11.ADS5263EVM評估板元件布局圖
詳情請見:
http://focus.ti.com/lit/ds/symlink/ads5263.pdf
和
http://focus.ti.com/lit/ug/slau344/slau344.pdf
本站內容除特別聲明的原創文章之外，轉載內容只為傳遞更多信息，并不代表本網站贊同其觀點。轉載的所有的文章、圖片、音/視頻文件等資料的版權歸版權所有權人所有。本站采用的非本站原創文章及圖片等內容無法一一聯系確認版權者。如涉及作品內容、版權和其它問題，請及時通過電子郵件或電話通知我們，以便迅速采取適當措施，避免給雙方造成不必要的經濟損失。聯系電話：010-82306118；郵箱：aet@chinaaet.com。